The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 2010

Filed:

Feb. 28, 2006
Applicants:

Koichi Sogawa, Hyogo, JP;

Kiyoshi Yano, Hyogo, JP;

Tohru Haruki, Hyogo, JP;

Hidetsugu Miyake, Hyogo, JP;

Shouji Tochishita, Hyogo, JP;

Minoru Ohtomo, Hyogo, JP;

Kenji Nishihara, Hyogo, JP;

Inventors:

Koichi Sogawa, Hyogo, JP;

Kiyoshi Yano, Hyogo, JP;

Tohru Haruki, Hyogo, JP;

Hidetsugu Miyake, Hyogo, JP;

Shouji Tochishita, Hyogo, JP;

Minoru Ohtomo, Hyogo, JP;

Kenji Nishihara, Hyogo, JP;

Assignee:

Ricoh Company, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor wafer is disclosed that includes a substrate; a plurality of device chip areas formed on the substrate; a plurality of scribe lines formed in a lattice-like manner on the substrate, the scribe lines being provided so as to separate the device chip areas from each other; a blank area in which at least one alignment mark formed of a metal film for alignment of the semiconductor wafer is formed, the blank area being provided in an area different from the device chip areas; and a scribe area in which the alignment mark is prevented from existing, the scribe area being provided in each area where the blank area crosses the scribe lines.


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