The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 2010
Filed:
Jun. 30, 2005
Paul B. Racunas, Marlborough, MA (US);
Joel S. Emer, Acton, MA (US);
Arijit Biswas, Holden, MA (US);
Shubhendu S. Mukherjee, Framingham, MA (US);
Steven E. Raasch, Shrewsbury, MA (US);
Paul B. Racunas, Marlborough, MA (US);
Joel S. Emer, Acton, MA (US);
Arijit Biswas, Holden, MA (US);
Shubhendu S. Mukherjee, Framingham, MA (US);
Steven E. Raasch, Shrewsbury, MA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments of apparatuses and methods for reducing the uncorrectable error rate in a lockstepped dual-modular redundancy system are disclosed. In one embodiment, an apparatus includes two processor cores, a micro-checker, a global checker, and fault logic. The micro-checker is to detect whether a value from a structure in one core matches a value from the corresponding structure in the other core. The global checker is to detect lockstep failures between the two cores. The fault logic is to cause the two cores to be resynchronized if there is a lockstep error but the micro-checker has detected a mismatch.