The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7739644 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 15, 2010

Filed:

Aug. 13, 2007
Applicants:

Philip Chong, Berkeley, CA (US);

Christian Szegedy, Albany, CA (US);

Inventors:

Philip Chong, Berkeley, CA (US);

Christian Szegedy, Albany, CA (US);

Assignee:

Candence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed are methods, systems, and computer program products for performing grid morphing technique for computing a spreading of objects over an area such that the final locations of the objects are distributed over the area and such that the final locations of the objects are minimally perturbed from their initial starting locations and the density of objects meets certain constraints. The minimization of perturbation, or stability, of the approaches disclosed, is the key feature which is the principal benefit of the techniques disclosed. The methods described herein may be used as part of a tool for placement or floorplanning of logic gates or larger macroblocks for the design of an integrated circuit.


Find Patent Forward Citations

Chong, Philip. (2010). Methods, systems, and computer program products for grid-morphing techniques in placement, floorplanning, and legalization (U.S. Patent No. 7739644). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7739644

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