The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 01, 2010
Filed:
Aug. 01, 2006
Hye-lan Lee, Hwaseong-si, KR;
Hag-ju Cho, Seoul, KR;
Taek-soo Jeon, Yongin-si, KR;
Yu-gyun Shin, Seongnam-si, KR;
Sang-bom Kang, Seoul, KR;
Hye-Lan Lee, Hwaseong-si, KR;
Hag-Ju Cho, Seoul, KR;
Taek-Soo Jeon, Yongin-si, KR;
Yu-Gyun Shin, Seongnam-si, KR;
Sang-Bom Kang, Seoul, KR;
Abstract
In a semiconductor device with dual gates and a method of manufacturing the same, a dielectric layer and first and second metallic conductive layers are successively formed on the semiconductor substrate having first and second regions. The second metallic conductive layer which is formed on the first metallic conductive layer of the second region is etched to form a metal pattern. The first metallic conductive layer is etched using the metal pattern as an etching mask. A polysilicon layer is formed on the dielectric layer and the metal pattern. The first gate electrode is formed by etching portions of the polysilicon layer, the metal pattern, and the first metallic conductive layer of the first region. The second gate electrode is formed by etching a portion of the polysilicon layer formed directly on the dielectric layer of the second region.