The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 25, 2010

Filed:

Oct. 06, 2005
Applicants:

Ryo Enomoto, Gihu, JP;

Yasuji Hiramatsu, Gihu, JP;

Inventors:

Ryo Enomoto, Gihu, JP;

Yasuji Hiramatsu, Gihu, JP;

Assignee:

Ibiden Co., Ltd., Ogaki-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01K 3/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

Holes () are formed with a laser beam through an insulating substrate () on which a metallic layer () is formed and via holes () are formed by filling up the holes () with a metal (). After the via holes () are formed, a conductor circuit () is formed by etching the metallic layer () and a single-sided circuit board (A) is formed by forming projecting conductors () on the surfaces of the via holes (). The projecting conductors () on the circuit board (A) are put on the conductor circuit () of another single-sided circuit board (B) with adhesive layers () composed of an uncured resin in-between and heated and pressed against the circuit (). The projecting conductors () get in the uncured resin by pushing aside the resin and are electrically connected to the circuit (). Since single-sided circuit boards (A,B,C, andD) can be inspected for defective parts before the boards (A,B,C, andD) are laminated upon one another, only defectless single-sided circuit can be used in the step of lamination.


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