The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 2010

Filed:

Jun. 29, 2007
Applicants:

Karl W. Barth, Poughkeepsie, NY (US);

Ramona Kei, Hopewell Junction, NY (US);

Kaushik A. Kumar, Beacon, NY (US);

Kevin S. Petrarca, Newburgh, NY (US);

Shahab Siddiqui, White Plains, NY (US);

Inventors:

Karl W. Barth, Poughkeepsie, NY (US);

Ramona Kei, Hopewell Junction, NY (US);

Kaushik A. Kumar, Beacon, NY (US);

Kevin S. Petrarca, Newburgh, NY (US);

Shahab Siddiqui, White Plains, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods of forming a metal interconnect and an IC chip including the metal interconnect are disclosed. One embodiment of the method may include providing an integrated circuit (IC) chip up to and including a middle of line (MOL) layer, the MOL layer including a contact positioned within a first dielectric; recessing the first dielectric such that the contact extends beyond an upper surface of the first dielectric; forming a second dielectric over the first dielectric such that the second dielectric surrounds at least a portion of the contact, the second dielectric having a lower dielectric constant than the first dielectric; forming a planarizing layer over the second dielectric; forming an opening through the planarizing layer and into the second dielectric to the contact; and forming a metal in the opening to form the metal interconnect.


Find Patent Forward Citations

Loading…