The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 2010

Filed:

Apr. 10, 2008
Applicants:

Kai Man Yue, Yuen Long N.T., HK;

Bomy Chen, Cupertino, CA (US);

Geeng Chuan Michael Chern, Cupertino, CA (US);

Tsung-lu Syu, Fremont, CA (US);

Inventors:

Kai Man Yue, Yuen Long N.T., HK;

Bomy Chen, Cupertino, CA (US);

Geeng Chuan Michael Chern, Cupertino, CA (US);

Tsung-Lu Syu, Fremont, CA (US);

Assignee:

Silicon Storage Technology, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 7/38 (2006.01); H03K 19/173 (2006.01); G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention is a storage element for controlling a logic circuit and a logic device having a plurality of storage elements. The storage element has a first and a second non-volatile memory cells connected in series at an output node. Each of the first and second non-volatile memory cells is for storing a state opposite to the other. A demultiplexer has an input, a switched input and two outputs. The output node is connected to the input of the demultiplexer. One of the outputs is used to control the logic circuit. The other output is connected to a bit line which is connected to a sense amplifier. Finally, the switched input receives a switch signal and outputs the signal from the output node to either the one output or the other output.


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