The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2010

Filed:

Dec. 08, 2006
Applicants:

Sudarshan Rangaraj, Chandler, AZ (US);

Shankar Ganapathysubramanian, Phoenix, AZ (US);

Richard Harries, Chandler, AZ (US);

Mitul Modi, Phoenix, AZ (US);

Sankara J. Subramanian, Chandler, AZ (US);

Inventors:

Sudarshan Rangaraj, Chandler, AZ (US);

Shankar Ganapathysubramanian, Phoenix, AZ (US);

Richard Harries, Chandler, AZ (US);

Mitul Modi, Phoenix, AZ (US);

Sankara J. Subramanian, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

A compliant structure for an electronic device comprises a substrate () composed of a first material () and a compliant zone () within the substrate. A plurality of solder joints () are located between, and form a connection between, the substrate and the electronic device (). The compliant zone reduces the degree of deformation experienced by the solder joints due to thermal mismatch loading between the substrate and the die during attachment of the die to the substrate (chip attach). This reduction in solder joint deformation reduces the likelihood that the solder joints will crack.


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