The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2010
Filed:
May. 04, 2006
Applicants:
Satish Damaraju, El Dorado Hills, CA (US);
Subramaniam Maiyuran, Gold River, CA (US);
Truyen Trinh, Elk Grove, CA (US);
Parag Raval, Folsom, CA (US);
Peter Smith, Folsom, CA (US);
Inventors:
Satish Damaraju, El Dorado Hills, CA (US);
Subramaniam Maiyuran, Gold River, CA (US);
Truyen Trinh, Elk Grove, CA (US);
Parag Raval, Folsom, CA (US);
Peter Smith, Folsom, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
The number of ways in an N-way set associative sequential cache is modulated to trade power and performance. Way selection is restricted during the allocation based on address so that only a subset of the N-ways is used for a range of addresses allowing the N-ways that are not in use to be powered off.