The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2010
Filed:
Nov. 01, 2005
Valeriy Sukharev, Cupertino, CA (US);
Ara Markosian, Cupertino, CA (US);
Valeriy Sukharev, Cupertino, CA (US);
Ara Markosian, Cupertino, CA (US);
Mentor Graphics Corporation, Wilsonville, OR (US);
Abstract
A method for determining an effect of via/contact pattern density in via/contact etch rate of a wafer includes determining a neutral etchant species number flux intersecting each via/contact mouth as a function of local layout characteristics and determining variations in the neutral etchant species flux number as a function of the via/contact pattern density in a wafer scale. The comparison of these number fluxes provides the capability to discriminate an underetched or an overetched via/contact from normal vias/contacts satisfying an etch tolerance criterion. Chip designers can modify the layout design to minimize via/contact failures. Chip manufacturers can modify the etching process to minimize via/contact failures.