The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 23, 2010
Filed:
Oct. 31, 2006
Matthias Passlack, Chandler, AZ (US);
Ravindranath Droopad, Chandler, AZ (US);
Karthik Rajagopalan, Chandler, AZ (US);
Matthias Passlack, Chandler, AZ (US);
Ravindranath Droopad, Chandler, AZ (US);
Karthik Rajagopalan, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method of forming a III-V compound semiconductor structure () comprises providing a III-V compound semiconductor substrate including a semi-insulating substrate () having at least one epitaxial layer formed thereon and further having a gate insulator () overlying the at least one epitaxial layer. The at least one epitaxial layer formed on the semi-insulating substrate comprises an epi-structure suitable for use in the formation of a channel of a III-V compound semiconductor MOSFET device, wherein the channel () having a first polarity. The method further comprises forming a charge layer () at a surface of the gate insulator, the charge layer having a second polarity, wherein the second polarity is opposite to the first polarity.