The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2010

Filed:

Oct. 02, 2006
Applicants:

Cheng-kuo Lin, Tao Yuan Shien, TW;

Yu-chi Wang, Tao Yuan Shien, TW;

Joseph Liu, Tao Yuan Shien, TW;

Jean Sun, Tao Yuan Shien, TW;

Inventors:

Cheng-Kuo Lin, Tao Yuan Shien, TW;

Yu-Chi Wang, Tao Yuan Shien, TW;

Joseph Liu, Tao Yuan Shien, TW;

Jean Sun, Tao Yuan Shien, TW;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An on-chip circuit for protection against electrostatic discharge (ESD) is disclosed. Unlike conventional ESD protection circuit using high turn-on voltage diode string, the circuit uses a plural of enhancement-mode HEMT/MESFET triggered by a shorter diode string to shunt large ESD current for protected susceptive RF circuit. Further, by using dual-gate technology of enhancement-mode HEMT/MESFET, the on-chip ESD protection circuit has the less parasitic capacitance without expanding device size for vulnerable RF circuit.


Find Patent Forward Citations

Lin, Cheng-Kuo. (2010). On-chip esd protection circuit using enhancement-mode hemt/mesfet technology (U.S. Patent No. 7679870). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7679870

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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