The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 09, 2010
Filed:
Feb. 14, 2008
Salvatore Leonardi, Aci S. Antonio, IT;
Salvatore Coffa, Tremestieri Etneo, IT;
Claudia Caligiore, Giarre, IT;
Guglielmo Fortunato, Rome, IT;
Luigi Mariucci, Rome, IT;
Massimo Cuscuna, Rome, IT;
Salvatore Leonardi, Aci S. Antonio, IT;
Salvatore Coffa, Tremestieri Etneo, IT;
Claudia Caligiore, Giarre, IT;
Guglielmo Fortunato, Rome, IT;
Luigi Mariucci, Rome, IT;
Massimo Cuscuna, Rome, IT;
STMicroelectronics S.r.l., Agrate Brianza, IT;
Abstract
A process for realizing TFT devices on a substrate comprises the steps of: forming on the substrate, in cascade, an amorphous silicon layer and a heavily doped amorphous silicon layer, forming a photolithographic mask on the heavily doped amorphous silicon layer provided with an opening, removing the heavily doped amorphous silicon layer through the opening for realizing opposite portions of the heavily doped amorphous silicon layer whose cross dimensions decrease as long as they depart from the amorphous silicon layer, removing the photolithographic mask, carrying out a diffusion and activation step of the dopant contained in the portions of the heavily doped amorphous silicon layer inside the amorphous silicon layer, for realizing source/drain regions of said TFT device.