The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 2010

Filed:

Aug. 03, 2006
Applicants:

Shingo Sudo, Tokyo, JP;

Tatsuo Ota, Tokyo, JP;

Nobutake Taniguchi, Tokyo, JP;

Hiroshi Yoshida, Tokyo, JP;

Hironori Kashimoto, Tokyo, JP;

Inventors:

Shingo Sudo, Tokyo, JP;

Tatsuo Ota, Tokyo, JP;

Nobutake Taniguchi, Tokyo, JP;

Hiroshi Yoshida, Tokyo, JP;

Hironori Kashimoto, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 41/047 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device which includes a radiating plate, a wiring patterned layer on the radiating plate via an insulating layer, at least one semiconductor chip mounted on the wiring patterned layer. The semiconductor chip has a surface electrode. The semiconductor device further includes a conductive lead plate electrically connected with the surface electrode of the semiconductor chip, and a resin package of thermoplastic resin having anisotropic linear expansion coefficient varying based upon directions. The resin package covers the wiring patterned layer, the semiconductor chip, the conductive lead plate, and at least a portion of the radiating plate. The conductive lead plate extends in a direction which provides the resin package with the maximum linear expansion coefficient. In the semiconductor device so structured, the warpage of the resin package is reduced both in longitudinal and transverse directions.


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