The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2010
Filed:
Sep. 11, 2007
Sampan Arora, Karnataka, IN;
Sandip Bag, Karnataka, IN;
Vinod Bussa, Hi-tech, IN;
Shubhodeep Roy Choudhury, Karnataka, IN;
Manoj Dusanapudi, Karnataka, IN;
Sunil Suresh Hatti, Karnataka, IN;
Shakti Kapoor, Austin, TX (US);
Batchu Naga Venkata Satyanarayana, Karnataka, IN;
Shiraz Mohammad Zaman, Delhi, IN;
Sampan Arora, Karnataka, IN;
Sandip Bag, Karnataka, IN;
Vinod Bussa, Hi-tech, IN;
Shubhodeep Roy Choudhury, Karnataka, IN;
Manoj Dusanapudi, Karnataka, IN;
Sunil Suresh Hatti, Karnataka, IN;
Shakti Kapoor, Austin, TX (US);
Batchu Naga Venkata Satyanarayana, Karnataka, IN;
Shiraz Mohammad Zaman, Delhi, IN;
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system and method for creating multiple test case scenarios from one test case by shuffling the test case instruction order while maintaining relative sub test case instruction order intact is presented. A test case generator generates and provides a test case that includes multiple sub test cases to a test case executor. In turn, the test case executor recursively schedules and dispatches the test case with different shuffled instruction orders to a processor in order to efficiently test the processor. In one embodiment, the test case generator provides multiple test cases to the test case executor. In another embodiment, the test case generator provides test cases to multiple test case executors that, in turn, shuffle the test cases and provide the shuffled test cases to their respective processor.