The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 2010
Filed:
May. 27, 2008
Applicants:
Yaocheng Liu, Elmsford, NY (US);
Alexander Reznicek, Mount Kisco, NY (US);
Devendra K. Sadana, Pleasantville, NY (US);
Inventors:
Yaocheng Liu, Elmsford, NY (US);
Alexander Reznicek, Mount Kisco, NY (US);
Devendra K. Sadana, Pleasantville, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3205 (2006.01); H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method to control the poly-Si depletion effect in CMOS structures utilizing a gas phase doping process which is capable of providing a high concentration of dopant atoms at the gate dielectric/poly-Si interface is provided. The present invention also provides CMOS structure including, for example, nFETs and/or pFETs, that are fabricated utilizing the gas phase doping technique described herein.