The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2010

Filed:

Jul. 16, 2007
Applicants:

Chien-kuo Wang, Hsin-Chu, TW;

Tai-chi Kao, Hsinchu, TW;

Tsuoe-hsiang Liao, Hsin-Chu, TW;

Yuan-che Lee, Taichung, TW;

Yu-ming Sun, Taoyuan County, TW;

Inventors:

Chien-Kuo Wang, Hsin-Chu, TW;

Tai-Chi Kao, Hsinchu, TW;

Tsuoe-Hsiang Liao, Hsin-Chu, TW;

Yuan-Che Lee, Taichung, TW;

Yu-Ming Sun, Taoyuan County, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01H 31/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A defect detection system and related method take advantage of multilevel detection technique for detecting defects on an integrated circuit. The defect detection system utilizes an analog-to-digital converter for converting an analog sensing signal into an output code having a plurality of bits. The defect detection methods include an open test method and a short test method. The open and short test methods both include a calibrating method and a testing method individually. The calibrating method functions to determine a preset reference voltage for the analog-to-digital converter based on a predetermined code. The testing method makes use of the preset reference voltage and the predetermined code for generating the output code having a plurality of bits. The output code is then utilized to determine whether or not there are open or short defects on the integrated circuit and to classify the defects.


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