The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2009
Filed:
Nov. 15, 2005
Yuichi Matsui, Kawasaki, JP;
Motoyasu Terao, Hinode, JP;
Norikatsu Takaura, Tokyo, JP;
Takahiro Morikawa, Hachioji, JP;
Naoki Yamamoto, Kochi, JP;
Yuichi Matsui, Kawasaki, JP;
Motoyasu Terao, Hinode, JP;
Norikatsu Takaura, Tokyo, JP;
Takahiro Morikawa, Hachioji, JP;
Naoki Yamamoto, Kochi, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
The annealing process at 400° C. or more required for the wiring process for a phase change memory has posed the problem in that the crystal grains in a chalcogenide material grow in an oblique direction to cause voids in a storage layer. The voids, in turn, cause peeling due to a decrease in adhesion, variations in resistance due to improper contact with a plug, and other undesirable events. After the chalcogenide material has been formed in an amorphous phase, post-annealing is conducted to form a (111)-oriented and columnarly structured face-centered cubic. This is further followed by high-temperature annealing to form a columnar, hexagonal closest-packed crystal. Use of this procedure makes it possible to suppress the growth of inclined crystal grains that causes voids, since crystal grains are formed in a direction perpendicular to the surface of an associated substrate.