The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2009
Filed:
Oct. 28, 2005
Venkatesh P. Gopinath, Fremont, CA (US);
Arvind Kamath, Mountain View, CA (US);
Mohammad R. Mirabedini, Redwood City, CA (US);
Ming-yi Lee, Fremont, CA (US);
Venkatesh P. Gopinath, Fremont, CA (US);
Arvind Kamath, Mountain View, CA (US);
Mohammad R. Mirabedini, Redwood City, CA (US);
Ming-Yi Lee, Fremont, CA (US);
LSI Corporation, Milpitas, CA (US);
Abstract
Provided are methods and composition for forming an isolation structure on an integrated circuit substrate. First, a trench is etched in the integrated circuit substrate. A lower dielectric layer is then formed in the trench such that the lower dielectric layer at least partially fills the trench. An upper dielectric layer is then formed over the lower dielectric layer to create an isolation structure, the upper dielectric layer and the lower dielectric layer together having an effective dielectric constant that is less than that of silicon dioxide, thereby enabling capacitance associated with the isolation structure to be reduced.