The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 2009
Filed:
Jun. 12, 2008
Ken Uchikoshi, Hitachinaka, JP;
Naokatsu Suwanai, Hitachinaka, JP;
Atsushi Tachigami, Mito, JP;
Katsuhiko Hotta, Hachioji, JP;
Masashi Sahara, Hitachinaka, JP;
Kazuhiko Sato, Sagamihara, JP;
Ken Uchikoshi, Hitachinaka, JP;
Naokatsu Suwanai, Hitachinaka, JP;
Atsushi Tachigami, Mito, JP;
Katsuhiko Hotta, Hachioji, JP;
Masashi Sahara, Hitachinaka, JP;
Kazuhiko Sato, Sagamihara, JP;
Renesas Technology Corp., Tokyo, JP;
Hitachi ULSI Systems Co., Ltd., Tokyo, JP;
Abstract
A semiconductor IC device which includes a circuit region and a peripheral region on a main surface of a semiconductor substrate, a first insulating film formed over the main surface, external terminals arranged in the peripheral region and formed over the first insulating film, a conductive guard ring formed over the first insulating film and provided around the external terminals, and second insulating films formed in the internal region and the peripheral region, the second insulating film in the peripheral region is formed over the first insulating film and over the guard ring and is contacting the external terminals, the second insulating films of the circuit region and that of the peripheral region are separately formed and are isolated from each other. Separate second insulating film may be formed over the wirings of one or more of existing wiring levels of the semiconductor device.