The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2009

Filed:

Apr. 25, 2006
Applicants:

Takashi Kitae, Osaka, JP;

Seiichi Nakatani, Osaka, JP;

Toshiyuki Kojima, Kyoto, JP;

Shingo Komatsu, Osaka, JP;

Yoshihisa Yamashita, Kyoto, JP;

Inventors:

Takashi Kitae, Osaka, JP;

Seiichi Nakatani, Osaka, JP;

Toshiyuki Kojima, Kyoto, JP;

Shingo Komatsu, Osaka, JP;

Yoshihisa Yamashita, Kyoto, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B23K 31/02 (2006.01); H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for forming solder bumps for realizing high density mounting and a highly reliable method for mounting a semiconductor device is provided. A flat plate having a plurality of projections or recesses thereon is prepared; the flat plate is aligned to oppose an electronic component and a resin composition including a solder powder is supplied to a gap between the flat plate and the electronic component; the resin composition is annealed to melt the solder powder included in the resin composition for growing the solder powder up to the level of the surface of the flat plate by allowing the melted solder powder to self-assemble on terminals, so as to form solder bumps on the terminals; and the flat plate is removed after cooling and solidifying the solder bumps. Thus, the solder bumps having pits corresponding to the projections or having protrusions corresponding to the recesses are formed.


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