The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2009

Filed:

Sep. 28, 2005
Applicants:

Karthisha S. Canagasaby, Santa Clara, CA (US);

Muraleedhara Navada, Santa Clara, CA (US);

Sanjay Dabral, Palo Alto, CA (US);

Inventors:

Karthisha S. Canagasaby, Santa Clara, CA (US);

Muraleedhara Navada, Santa Clara, CA (US);

Sanjay Dabral, Palo Alto, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 7/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, the present invention includes a method for associating a first plurality of current sources with a first tap coefficient and associating a second plurality of current sources with a second tap coefficient. A first plurality of output switches coupled to the first plurality of current sources is gated using the first tap coefficient and a second plurality of output switches coupled to the second plurality of current sources is gated using the second tap coefficient. In such manner, the first and second plurality of equalized current sources may be driven onto an interconnect. Other embodiments are described and claimed.


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