The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2009

Filed:

Dec. 12, 2006
Applicants:

Gwo-liang Weng, Kaohsiung, TW;

Yung-li LU, Kaohsiung, TW;

Cheng-yin Lee, Kaohsiung, TW;

Inventors:

Gwo-Liang Weng, Kaohsiung, TW;

Yung-Li Lu, Kaohsiung, TW;

Cheng-Yin Lee, Kaohsiung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A stackable semiconductor package includes first and second substrates, a semiconductor device, first wires, a supporting element, and a first molding compound. The semiconductor device is disposed on the first substrate. The second substrate is disposed above the semiconductor device, and the area of the second substrate is larger than that of the semiconductor device. The first wires electrically connect the first and second substrates. The supporting element is disposed between the first and second substrates, and supports the second substrate. Some pads of the second substrate are exposed outside the first molding compound. Therefore, the overhang portion of the second substrate will not shake or sway during wire bonding, and the area of the second substrate can be increased to have more devices thereon. Also, the thickness of the second substrate can be reduced, to reduce the overall thickness of the stackable semiconductor package.


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