The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2009
Filed:
Jun. 16, 2006
Xiaomei Bu, Singapore, SG;
Alex See, Singapore, SG;
Fan Zhang, Singapore, SG;
Jane Hui, Singapore, SG;
Tae Jong Lee, Singapore, SG;
Liang Choo Hsia, Singapore, SG;
Xiaomei Bu, Singapore, SG;
Alex See, Singapore, SG;
Fan Zhang, Singapore, SG;
Jane Hui, Singapore, SG;
Tae Jong Lee, Singapore, SG;
Liang Choo Hsia, Singapore, SG;
Chartered Semiconductor Manufacturing, Ltd., Singapore, SG;
Abstract
A method of filling gaps in dielectric layers is disclosed. A wafer is provided having a dielectric layer containing gaps to be filled with copper, some of the gaps, denoted deeper gaps, having aspect ratios so large that filling these gaps with copper using ECP could result in pinhole like voids. A blanket conformal metal barrier layer is formed and the wafer is then submerged in a solution to electroless plate a blanket conformal copper seed layer. A partial filling of deeper gaps with copper reduces the effective aspect ratios of the deeper gaps to the extent that ECP could be used to complete the copper filling of the gaps without forming pinhole like voids. ECP is then used to complete the copper filling of the gaps. The wafer is annealed and CMP performed to planarize the surface, giving rise to a structure in which the gaps are filled with copper and are separated by the dielectric layer.