The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 2009
Filed:
Jul. 30, 2007
Yongsik Yu, Lake Oswego, OR (US);
Mandyam Sriram, Beaverton, OR (US);
Roey Shaviv, Palo Alto, CA (US);
Kaushik Chattopadhyay, San Jose, CA (US);
Hui-jung Wu, Fremont, CA (US);
Yongsik Yu, Lake Oswego, OR (US);
Mandyam Sriram, Beaverton, OR (US);
Roey Shaviv, Palo Alto, CA (US);
Kaushik Chattopadhyay, San Jose, CA (US);
Hui-Jung Wu, Fremont, CA (US);
Novellus Systems, Inc., San Jose, CA (US);
Abstract
Capping protective self aligned buffer (PSAB) layers are layers of material that are selectively formed at the surface of metal layers in a partially fabricated semiconductor device. Encapsulating PSAB layers are formed not only at the surface of the metal layers, but also within the unexposed portions of the metal lines. Encapsulating PSAB layer, for example, can surround the metal line with the PSAB material, thereby protecting interfaces between the metal line and diffusion barriers. Encapsulating PSAB layers can be formed by treating the exposed surfaces of metal lines with GeH. Capping PSAB layers can be formed by treating the exposed surfaces of metal lines with SiH. Interconnects having both a silicon-containing capping PSAB layer and a germanium-containing encapsulating PSAB layer provide good performance in terms of adhesion, resistance shift, and electromigration characteristics.