The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2009
Filed:
Nov. 02, 2007
OM Agrawal, Los Altos, CA (US);
Manish Garg, San Jose, CA (US);
Chan-chi Jason Cheng, Fremont, CA (US);
Satwant Singh, Fremont, CA (US);
Ju Shen, San Jose, CA (US);
Om Agrawal, Los Altos, CA (US);
Manish Garg, San Jose, CA (US);
Chan-Chi Jason Cheng, Fremont, CA (US);
Satwant Singh, Fremont, CA (US);
Ju Shen, San Jose, CA (US);
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Abstract
A programmable logic block within a programmable logic device includes at least two interconnected slices, each of the interconnect slices including at least two interconnected lookup tables. Each interconnected lookup table is adapted to receive input signals from a routing structure and to provide a LUT output signal. At least one of the slices includes a register adapted to register the LUT output signal of a lookup table and at least another of the slices includes fewer such registers than lookup tables.