The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2009

Filed:

Sep. 06, 2006
Applicants:

Tz-cheng Chiu, Plano, TX (US);

Rajiv Carl Dunne, Irving, TX (US);

Inventors:

Tz-Cheng Chiu, Plano, TX (US);

Rajiv Carl Dunne, Irving, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a semiconductor flip-chip package having a semiconductor die as part of a substrate assembly, a lid (or lid assembly) and substrate are supported to prevent tilting and teetering of the lid. The lid and substrate do not adhere, so as to reduce cracking of solder joints due to thermal cycling induced by repeated system power on-off. An adhesion prohibitor may be applied so that a support does not adhere to both lid and substrate; the support may be prevented from adhering to both lid and substrate by a separate curing step. The arrangements and fabrication methods may be applied to many package types, including ball grid array (BGA) and land grid array (LGA) packages.


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