The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2009
Filed:
Dec. 30, 2005
Charles H. Winstead, Portland, OR (US);
Rajshree P. Sankaran, Portland, OR (US);
Samer M. Taha, Beaverton, OR (US);
Jiang Qu, Portland, OR (US);
Chandra Mouli, Portland, OR (US);
Charles H. Winstead, Portland, OR (US);
Rajshree P. Sankaran, Portland, OR (US);
Samer M. Taha, Beaverton, OR (US);
Jiang Qu, Portland, OR (US);
Chandra Mouli, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
According to embodiments of the invention, an integrated configuration, flow and execution systems (ICFES) may be used to specify, control and record a history of processing of both semiconductor device experimental lots and production lots of wafers. Moreover, the system allows combining of one or more partial flows of pre-existing flow blocks, and special processing into another processing flow block. A lot plan can be created that includes the flow block, and the lot plan can be updated to include partial flows and special processing before or during processing of the lot plan.