The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2009
Filed:
Dec. 21, 2007
Sankaran M. Menon, Austin, TX (US);
Luis A. Basto, Austin, TX (US);
Tien Dinh, Cedar Park, TX (US);
Thomas Tomazin, Austin, TX (US);
Juan G. Revilla, Austin, TX (US);
Sankaran M. Menon, Austin, TX (US);
Luis A. Basto, Austin, TX (US);
Tien Dinh, Cedar Park, TX (US);
Thomas Tomazin, Austin, TX (US);
Juan G. Revilla, Austin, TX (US);
Intel Corporation, Santa Clara, CA (US);
Analog Devices, Inc., Norwood, MA (US);
Abstract
The inputs to an embedded core, e.g., the core terminals, may not be directly connected to pins on the SoC. The lack of direct access to an embedded core's terminals may complicate testing of the embedded core. A test wrapper including boundary scan test (BST) cells may be used to test an embedded core. Dual function BST/ATPG (Automatic Test Pattern Generation) cells may be used to perform both BST and ATPG tests on embedded cores.