The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2009

Filed:

Oct. 13, 2004
Applicants:

Tahir Hussain, Calabasas, CA (US);

Miroslav Micovic, Newbury Park, CA (US);

Paul Hashimoto, Los Angeles, CA (US);

Gary Peng, San Gabriel, CA (US);

Ara K. Kurdoghlian, La Canada Flintridge, CA (US);

Inventors:

Tahir Hussain, Calabasas, CA (US);

Miroslav Micovic, Newbury Park, CA (US);

Paul Hashimoto, Los Angeles, CA (US);

Gary Peng, San Gabriel, CA (US);

Ara K. Kurdoghlian, La Canada Flintridge, CA (US);

Assignee:

HRL Laboratories, LLC, Malibu, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/072 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a semiconductor device which protects the ohmic metal contacts and the channel of the device during subsequent high temperature processing steps is explained. An encapsulation layer is used to cover the channel and ohmic metal contacts. The present invention provides a substrate on which a plurality of semiconductor layers are deposited. The semiconductor layers act as the channel of the device. The semiconductor layers are covered with an encapsulation layer. A portion of the encapsulation layer and the plurality of semiconductor layers are removed, wherein ohmic metal contacts are deposited. The ohmic metal contacts are then annealed to help reduce their resistance. The encapsulation layer ensures that the ohmic metal contacts do not migrate during the annealing step and that the channel is not harmed by the high temperatures needed during the annealing step.


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