The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2009
Filed:
Aug. 31, 2006
Jie-hua Zhao, Plano, TX (US);
George R. Leal, Cedar Park, TX (US);
Robert J. Wenzel, Austin, TX (US);
Scott K. Pozder, Austin, TX (US);
Jie-Hua Zhao, Plano, TX (US);
George R. Leal, Cedar Park, TX (US);
Robert J. Wenzel, Austin, TX (US);
Scott K. Pozder, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method of forming an embedded device build-up package () includes forming a first plurality of features () over a packaging substrate (), wherein the first plurality of features () comprises a first feature and a second feature, forming at least a first crack arrest feature () in a first crack arrest available region (), wherein the first crack arrest available region is between the first feature and the second feature, forming a second plurality of features () over the first plurality of features () wherein the second plurality of features includes a third feature and a fourth feature, and forming at least a second crack arrest feature () in a second crack arrest available region (), wherein the second crack arrest feature () is between the third feature and the fourth feature, and the second crack arrest feature () is substantially orthogonal to the first crack arrest feature ().