The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 2009
Filed:
Jun. 08, 2006
Hyun-soo Chung, Hwaseong-si, KR;
In-young Lee, Yongin-si, KR;
Dong-hyeon Jang, Suwon-si, KR;
Myeong-soon Park, Suwon-si, KR;
Dong-ho Lee, Seongnam-si, KR;
Hyun-Soo Chung, Hwaseong-si, KR;
In-Young Lee, Yongin-si, KR;
Dong-Hyeon Jang, Suwon-si, KR;
Myeong-Soon Park, Suwon-si, KR;
Dong-Ho Lee, Seongnam-si, KR;
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Abstract
A wafer level package may include a semiconductor substrate supporting an electrode pad. A first insulating layer may be provided on the semiconductor substrate. The first insulating layer may include a first opening through which the electrode pad may be exposed. A seed metal layer may be provided on an entire surface of the first insulating layer. A redistribution interconnection metal layer may be provided on the seed metal layer. A second insulating layer may be provided on the redistribution interconnection metal layer. The second insulating layer may have a second opening spaced from the first opening to expose a portion of the redistribution interconnection metal layer. The second insulating layer may surround the redistribution interconnection metal layer. An unwanted portion of seed metal layer may be removed using the second insulating layer as an etch mask.