The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2009
Filed:
May. 03, 2006
Bret Stott, Menlo Park, CA (US);
Philip Yeung, Mountain View, CA (US);
John W. Brooks, San Jose, CA (US);
Benedict Lau, San Jose, CA (US);
Chanh V. Tran, San Jose, CA (US);
Eugene C. Ho, San Jose, CA (US);
Bret Stott, Menlo Park, CA (US);
Philip Yeung, Mountain View, CA (US);
John W. Brooks, San Jose, CA (US);
Benedict Lau, San Jose, CA (US);
Chanh V. Tran, San Jose, CA (US);
Eugene C. Ho, San Jose, CA (US);
Rambus Inc., Los Altos, CA (US);
Abstract
An integrated circuit is described. The integrated circuit includes an interface circuit that includes a transmitter and a receiver. A generator in the integrated circuit is selectively coupled to the transmitter. The generator is to provide a test sequence that is output by the transmitter during a test mode of operation. A memory in the integrated circuit is selectively coupled to the generator and the receiver. The memory is to receive and synchronize the test sequence and a signal corresponding to the test sequence that is received by the receiver. A logic circuit in the integrated circuit is to compare the test sequence and the signal.