The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2009
Filed:
Dec. 27, 2005
Belgacem Haba, Saratoga, CA (US);
Ilyas Mohammed, Santa Clara, CA (US);
Craig S. Mitchell, San Jose, CA (US);
Michael Warner, San Jose, CA (US);
Jesse Burl Thompson, Brentwood, CA (US);
Belgacem Haba, Saratoga, CA (US);
Ilyas Mohammed, Santa Clara, CA (US);
Craig S. Mitchell, San Jose, CA (US);
Michael Warner, San Jose, CA (US);
Jesse Burl Thompson, Brentwood, CA (US);
Tessera, Inc., San Jose, CA (US);
Abstract
A dielectric structure is formed by a molding process, so that a first surface of a dielectric structure is shaped by contact with the mold. The opposite second surface of the dielectric structure is applied onto the front surface of a wafer element. The dielectric layer may include protruding bumps and terminals may be formed on the bumps. The bumps may be of a precise height. The terminals lie at a precisely controlled height above the front surface of the wafer element. The terminals may include projecting posts which extend above a surrounding solder mask layer to facilitate engagement with a test fixture. The posts are immersed within solder joints when the structure is bonded to a circuit panel.