Lateral junction field-effect transistor

Abstract

A lateral JFET has a basic structure including an n-type semiconductor layer () formed of an n-type impurity region and a p-type semiconductor layer formed of a p-type impurity region on the n-type semiconductor layer (). Moreover, in the p-type semiconductor layer, there are provided a p-type gate region layer () extending into the n-type semiconductor layer () and containing p-type impurities of an impurity concentration higher than that of the n-type semiconductor layer () and an n-type drain region layer () spaced from the p-type gate region layer () by a predetermined distance and containing n-type impurities of an impurity concentration higher than that of the n-type semiconductor layer (). With this structure, the lateral JFET can be provided that has an ON resistance further decreased while maintaining a high breakdown voltage performance.