The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2009
Filed:
May. 12, 2006
Toni D. Van Gompel, Austin, TX (US);
Kuang-hsin Chen, Austin, TX (US);
Laegu Kang, Austin, TX (US);
Rode R. Mora, Austin, TX (US);
Michael D. Turner, San Antonio, TX (US);
Toni D. Van Gompel, Austin, TX (US);
Kuang-Hsin Chen, Austin, TX (US);
Laegu Kang, Austin, TX (US);
Rode R. Mora, Austin, TX (US);
Michael D. Turner, San Antonio, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A process of forming an electronic device can include patterning a semiconductor layer to define an opening extending to an insulating layer, wherein the insulating layer lies between a substrate and the semiconductor layer. After patterning the semiconductor layer, the opening can have a bottom, and the semiconductor layer can have a sidewall and a surface. The surface can be spaced apart from the insulating layer, and the sidewall can extend from the surface towards the insulating layer. The process can also include depositing a nitride layer within the opening, wherein depositing is performed using a PECVD technique. The process can further include densifying the nitride layer. The process can still further include removing a part of the nitride layer, wherein a remaining portion of the nitride layer can lie within the opening and be spaced apart from the surface.