The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2009
Filed:
Dec. 23, 2003
Kenji Takeshita, Fremont, CA (US);
Odette Turmel, Fremont, CA (US);
Felix Kozakevich, Sunnyvale, CA (US);
Eric Hudson, Berkeley, CA (US);
Kenji Takeshita, Fremont, CA (US);
Odette Turmel, Fremont, CA (US);
Felix Kozakevich, Sunnyvale, CA (US);
Eric Hudson, Berkeley, CA (US);
LAM Research Corporation, Fremont, CA (US);
Abstract
A method in a plasma processing system for etching a feature through a dielectric layer of a dual damascene stack on a semiconductor substrate is disclosed. The method includes placing the substrate in a plasma processing chamber of the plasma processing system. The method further includes flowing an etchant gas mixture into the plasma processing chamber, the etchant gas mixture being configured to etch the dielectric layer. The method additionally includes striking a plasma from the etchant source gas. The method also includes etching the feature through the dielectric layer while applying a bias RF signal to the substrate, the bias RF signal having a bias RF frequency of between about 27 MHz and about 90 MHz. The bias RF signal further has a bias RF power component that is configured to cause the feature to be etched in accordance to predefined etch rate parameters and etch profile parameters at the bias RF frequency.