The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2009

Filed:

May. 24, 2007
Applicants:

Shinji Bessho, Tsukuba, JP;

Takumi Nasu, Tsuchiura, JP;

Takuya Nakanishi, Tsukuba, JP;

Koichiro Ito, Tsukuba, JP;

Inventors:

Shinji Bessho, Tsukuba, JP;

Takumi Nasu, Tsuchiura, JP;

Takuya Nakanishi, Tsukuba, JP;

Koichiro Ito, Tsukuba, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory architecture for an array of memory cells having a plurality of sections of memory and a plurality of regions disposed between the plurality of sections of memory. Each section of memory having a plurality of memory cells arranged in rows and columns of memory and a plurality of sense amplifiers located in each of the plurality of regions. The sense amplifiers coupled to a respective column of memory. A plurality of column select lines are located in each of the plurality of regions with each column select line coupled to a group of column select switches associated with a section of memory to activate the respective column select switches.


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