The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 31, 2009
Filed:
Oct. 06, 2005
Yue-song He, San Jose, CA (US);
Chung Wai Leung, Milpitas, CA (US);
Jin-ho Kim, Cupertino, CA (US);
Kwok Kwok NG, Morgan Hill, CA (US);
Yue-Song He, San Jose, CA (US);
Chung Wai Leung, Milpitas, CA (US);
Jin-Ho Kim, Cupertino, CA (US);
Kwok Kwok Ng, Morgan Hill, CA (US);
ProMOS Technologies Inc., Hsin Chu, TW;
Abstract
A memory cell () has a plurality of floating gates (L,R). The channel region () comprises a plurality of sub-regions (L,R) adjacent to the respective floating gates, and a connection region () between the floating gates. The connection region has the same conductivity type as the source/drain regions () to increase the channel conductivity. Therefore, the floating gates can be brought closer together even though the inter-gate dielectric () becomes thick between the floating gates, weakening the control gate's () electrical field in the channel.