The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2009
Filed:
Mar. 15, 2007
Tom Zhong, Cupertino, CA (US);
Terry Kin Ting Ko, Millbrae, CA (US);
Chyu-jiuh Torng, Pleasanton, CA (US);
Wai-ming Kan, San Ramon, CA (US);
Adam Zhong, Milpitas, CA (US);
Tom Zhong, Cupertino, CA (US);
Terry Kin Ting Ko, Millbrae, CA (US);
Chyu-Jiuh Torng, Pleasanton, CA (US);
Wai-Ming Kan, San Ramon, CA (US);
Adam Zhong, Milpitas, CA (US);
Magic Technologies, Inc., Milpitas, CA (US);
Abstract
An MTJ pattern layout for a memory device is disclosed that includes two CMP assist features outside active MTJ device blocks. A first plurality of dummy MTJ devices is located in two dummy bands formed around an active MTJ device block. The inner dummy band is separated from the outer dummy band by the MTJ ILD layer and has a MTJ device density essentially the same as the MTJ device block. The outer dummy band has a MTJ device density at least 10% greater than the inner dummy band. The inner dummy band serves to minimize CMP edge effect in the MTJ device block while the outer dummy band improves planarization. A second plurality of dummy MTJ devices is employed in contact pads outside the outer dummy band and is formed between a WL ILD layer and a BIT ILD layer thereby minimizing delamination of the MTJ ILD layer.