The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 17, 2009
Filed:
Mar. 28, 2005
Chung-wah Norris Ip, Fremont, CA (US);
Mohit Kumar Jain, San Jose, CA (US);
Chung-Wah Norris Ip, Fremont, CA (US);
Mohit Kumar Jain, San Jose, CA (US);
Jasper Design Automation, Inc., Mountain View, CA (US);
Abstract
While performing functional verification on a circuit design, a verification tool allows a user to analyze the results of a previous functional analysis. The tool may also receive commands for a next verification analysis while performing a current analysis, and it may allow a user to abort a current analysis. Results from a completed analysis may be discarded or saved for viewing by a user while a next verification is performed on the circuit design. This allows a user to continue to debug and analyze the circuit design without having to wait until previous steps in the verification analysis are completed.