The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2009

Filed:

Oct. 18, 2004
Applicants:

Tetsuya Osaka, Tokyo, JP;

Tokihiko Yokoshima, Tokyo, JP;

Isao Sato, Kawasaki, JP;

Akira Hashimoto, Kawasaki, JP;

Yoshio Hagiwara, Kawasaki, JP;

Inventors:

Tetsuya Osaka, Tokyo, JP;

Tokihiko Yokoshima, Tokyo, JP;

Isao Sato, Kawasaki, JP;

Akira Hashimoto, Kawasaki, JP;

Yoshio Hagiwara, Kawasaki, JP;

Assignees:

Waseda University, Tokyo, JP;

Tokyo Ohka Kogyo Co., Ltd., Kanagawa Prefecture, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/02 (2006.01); H05K 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A silica-based interlayer insulating layer having a low dielectric constant is formed with SOG material on a substrate, in which a wiring-layer forming space is then formed. If necessary, a UV ray irradiation is performed under an oxidizing atmosphere. A Si—OH bond is formed on a surface of the insulating layer. A monomolecular layer film is then adhered to the inner surface of the space, which is then modified to be a catalyst with a solution containing Pd compound. On the catalyst monomolecular layer, a copper-diffusion-resistant film is formed by electroless plating, on which a copper plate is then formed as a wiring layer.


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