The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2009

Filed:

Feb. 21, 2006
Applicants:

Devendra Kumar, Los Altos Hills, CA (US);

Kamal Kishore Goundar, Yokohama, JP;

Nathanael R. C. Kemeling, Lightheim, JP;

Hideaki Fukuda, Tama, JP;

Hessel Sprey, Kessel-Lo, BE;

Maarten Stokhof, Leuven, BE;

Inventors:

Devendra Kumar, Los Altos Hills, CA (US);

Kamal Kishore Goundar, Yokohama, JP;

Nathanael R. C. Kemeling, Lightheim, JP;

Hideaki Fukuda, Tama, JP;

Hessel Sprey, Kessel-Lo, BE;

Maarten Stokhof, Leuven, BE;

Assignee:

ASM America, Inc., Phoenix, AZ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/322 (2006.01);
U.S. Cl.
CPC ...
Abstract

Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Preferred embodiments are directed to providing conformal lining over openings formed in porous materials. Trenches are formed in, preferably, insulating layers. The layers are then adequately treated with a particular plasma process. Following this plasma treatment a self-limiting, self-saturating atomic layer deposition (ALD) reaction can occur without significantly filling the pores forming improved interconnects.

Published as:
WO2006091510A1; US2006216932A1; TW200634982A; EP1851794A1; KR20070108918A; JP2008532271A; US7498242B2;

Find Patent Forward Citations

Loading…