The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2009
Filed:
Aug. 25, 2006
Weiping Fang, Fremont, CA (US);
Huijuan Zhang, Cupertino, CA (US);
Yibing Wang, Sunnyvale, CA (US);
Zongwu Tang, Pleasanton, CA (US);
Weiping Fang, Fremont, CA (US);
Huijuan Zhang, Cupertino, CA (US);
Yibing Wang, Sunnyvale, CA (US);
Zongwu Tang, Pleasanton, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
A system that verifies a simulated wafer image against an intended design. During operation, the system receives a design. Next, the system generates a skeleton from the design, wherein the skeleton specifies cell placements and associated bounding boxes for the cell placements, but does not include geometries for the cell placements. The system then computes environments for cell placements based on the skeleton. Next, the system generates templates for cell placements, wherein a template for a cell placement specifies the cell placement and the environment surrounding the cell placement. The system then generates the simulated wafer image by performing model-based simulations for cell placements associated with unique templates.