The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2009

Filed:

Apr. 12, 2005
Applicants:

Tamotsu Kitamura, Nagano, JP;

Norihide Hanami, Nagano, JP;

Inventors:

Tamotsu Kitamura, Nagano, JP;

Norihide Hanami, Nagano, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor package automatic wiring apparatus which determines an optimum wiring route from each pad to a corresponding one of vias on a semiconductor package having a multi-tier bonding pad structure in which pads to be connected to a semiconductor chip are arranged in multiple rows, comprises: row identifying means for identifying each pad as to which row the pad belongs to; tentative placement means for mapping the position of the pad to a position on a matrix table after the pad has been identified by the row identifying means as to which row the pad belongs to; and determining means for determining the optimum wiring route based on the matrix table generated by the tentative placement means.


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