The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2009

Filed:

Jul. 11, 2006
Applicants:

Jorge Adrian Kittl, Waterloo, BE;

Anne Lauwers, Aartselaar, BE;

Anabela Veloso, Leuven, BE;

Anil Kottantharyil, Leuven, BE;

Marcus Johannes Henricus Van Dal, Leuven, BE;

Inventors:

Jorge Adrian Kittl, Waterloo, BE;

Anne Lauwers, Aartselaar, BE;

Anabela Veloso, Leuven, BE;

Anil Kottantharyil, Leuven, BE;

Marcus Johannes Henricus Van Dal, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3205 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing a MOSFET device with a fully silicided (FUSI) gate is described. This method may be used to prevent formation of shorts between the FUSI gate and a contact to a source and/or a drain region. In particular, the method discloses the formation of an expansion volume above a gate dielectric. The volume is designed to substantially contain the fully silicided gate.


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