The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2009

Filed:

Apr. 24, 2006
Applicants:

Michael D. Turner, San Antonio, TX (US);

Mohamad M. Jahanbani, Austin, TX (US);

Toni D. Van Gompel, Austin, TX (US);

Mark D. Hall, Austin, TX (US);

Inventors:

Michael D. Turner, San Antonio, TX (US);

Mohamad M. Jahanbani, Austin, TX (US);

Toni D. Van Gompel, Austin, TX (US);

Mark D. Hall, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 23/58 (2006.01);
U.S. Cl.
CPC ...
Abstract

A process of forming an electronic device can include patterning a semiconductor layer to define an opening extending to an insulating layer, wherein the insulating layer lies between a substrate and the semiconductor layer. After patterning a semiconductor layer, the semiconductor layer can have a sidewall and a surface, the surface can be spaced apart from the insulating layer, and the sidewall can extend from the surface towards the insulating layer. The process can also include chemical vapor depositing a first layer adjacent to the sidewall, wherein the first layer lies within the opening and adjacent to the sidewall, and is spaced apart from the surface. Chemical vapor depositing the first layer can be performed using an inductively coupled plasma.


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