The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2009

Filed:

Sep. 23, 2005
Applicants:

Chih-ning Wu, Hsin-Chu, TW;

Hsin Tai, Taipei, TW;

Chung-ju Lee, Hsin-Chu Hsien, TW;

Wei-tsun Shiau, Kao-Hsiung Hsien, TW;

Inventors:

Chih-Ning Wu, Hsin-Chu, TW;

Hsin Tai, Taipei, TW;

Chung-Ju Lee, Hsin-Chu Hsien, TW;

Wei-Tsun Shiau, Kao-Hsiung Hsien, TW;

Assignee:

United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating strained-silicon transistors includes providing a semiconductor substrate, in which the semiconductor substrate contains a gate structure thereon; performing an etching process to form two recesses corresponding to the gate structure within the semiconductor substrate; performing an oxygen flush on the semiconductor substrate; performing a cleaning process on the semiconductor substrate; and performing a selective epitaxial growth (SEG) to form an epitaxial layer in each recess for forming a source/drain region.


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