The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 10, 2009
Filed:
Oct. 03, 2005
Christopher Hess, San Carlos, CA (US);
Angelo Rossoni, Brescia, IT;
Stefano Tonello, Breganze, IT;
Michele Squicciarini, Noceto, IT;
Michele Quarantelli, Noceto, IT;
Christopher Hess, San Carlos, CA (US);
Angelo Rossoni, Brescia, IT;
Stefano Tonello, Breganze, IT;
Michele Squicciarini, Noceto, IT;
Michele Quarantelli, Noceto, IT;
PDF Solutions, Inc., San Jose, CA (US);
Abstract
A layout for devices under test formed on a semiconductor wafer for use in wafer testing includes a first array of devices under test and a first pad set formed adjacent to the first array. The first pad set includes a gate force pad, a source pad, and a drain pad. Each of the devices under test in the first array is connected to the gate pad of the first pad set. Each of the devices under test in the first array is connected to the source pad of the first pad set. Each of the devices under test in the first array is connected to the drain pad of the first pad set.