The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2009

Filed:

Oct. 31, 2006
Applicants:

James J. Wang, Phoenix, AZ (US);

William G. Mcdonald, Scottsdale, AZ (US);

Inventors:

James J. Wang, Phoenix, AZ (US);

William G. McDonald, Scottsdale, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and apparatus are provided for decreasing the size of Quad Flat No-Lead (QFN) packages () down to chip-scale packages. Such QFN packages include a first semiconductor chip (), a plurality of recessed leads () having mold lock features, and a mold materialsubstantially encasing all sides of the semiconductor chip. An active surface () of the semiconductor chip is oriented toward a mounting side () of the QFN package, and a plurality of wire bondsdisposed between the active surface and the mounting side couple the active side to the leads. The QFN packages may also include a second semiconductor chip () coupled to a plurality of leads () and to the first semiconductor chip via wire bonds () in a manner similar to the first semiconductor chip.


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